Chip-Banner Career


UNIVE provides a comprehensive compensation package that includes the following benefits.

  • Medical Coverage
  • Dental Coverage
  • Prescription Drug Program
  • Vision Coverage
  • Life and AD&D Insurance
  • Long & Short Term Disability
  • Travel Accident Insurance
  • Education Reimbursement
  • 401(K) Plan
  • Employee Referral Program
  • Holiday and Vacation Benefits



We are a team of innovators with incredible passion for our vision. We are seeking highly qualified individuals who thrive in a challenging, creative and fast moving environment for the following positions. If you are interested, please send your resume to

Senior ASIC Design Engineer

Design and implement leading edge communication and multimedia application ASIC product. Responsibilities include Verilog/VHDL RTL design and verification of complex modules, logic synthesis, and chip level integration. The preferred candidate will have a BSEE and a minimum 5 years experience with logic design with HDL/VHDL. Demonstrable knowledge of design methodologies, verification techniques and synthesis of complex ASIC is required in this role. Knowledge of ASIC test methodologies and hand-on experience with test insertion and ATPG is highly desirable. Also ARM/DSP core embedded design experiences are plus. Job site: Fremont, CA.

Senior SRAM Design Engineer

Participate in the SRAM circuit design project for LDI driver, Low Power, and Test Cheip for Process monitoring products. Work on SRAM design with focus on low power SRAM, SRAM as a display memory, and Special SRAM such as process monitoring and Fifo etc. Use design tools such as HSPICE, Star_sim for Circuit Simulator, and Cadence OPUS tools for Schematic/Layout Editor. Conduct Spec analysis for competitor, create the Spec. for the project, design and simulate the memory controller, Layout Memory Device, prepare test program, and conduct follow-up test when device comes out from fab. Bachelor's degree in Electronics Engineering + 5 years of experience. Email resume to Unive, Inc.: Job site: Fremont, CA.

Senior Optical System Engineer

Design and develop optical interconnect system based on plastic optical module and plastic optical fiber with VCSEL and PD at 2.5 Gbps and up to 10 Gbps. Participate in chipset design process for VCSEL driver and PD receiver. Test and analyze optical interconnect system using ParBERT and DCA. Apply knowledge in Optical transmission system: DWDM, WDM-PON; Optical transceiver: SFP, SFF, BiDi; Optical device : LD, VCSEL, PD; Optical charaterization: BER, eye pattern, ER, link budget; High speed circuit test and analysis; Ray optics design with lens, filter and mirror; CODE V, Matlab, C, C++, Visual Basic. MS Electronic Engineering/Electrical Engineering

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